Bicameral LLC v. NXP USA, Inc. et al

Western District of Texas, txwd-6:2018-cv-00294

Appendix A to Hansquine Declaration

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DAVID HANSQUINE Raleigh, NC, USA 1.919.451.2725 https://semi.allucanapp.com dhansqui@gmail.com PROFESSIONAL SUMMARY A 23 year semiconductor design veteran and recognized inventor on 23 US and several foreign patents. Started career as a design engineer including RTL, circuit design and layout for video processing and mobile chips. Focused expertise in microcircuit and semiconductor technologies including circuit design and analysis, foundry process evaluation and selection, design automation, design for test (DFT), chip manufacturing, wafer and product testing, quality, reliability and defect / failure analysis. Currently a Principal at SmartSemi Engineering providing semiconductor consulting services. • Designed Static Random Access Memories (SRAMs), shifters, dynamic circuits for Content Addressible Memory (CAM) used for low power and high performance caches, logic and memory test circuits including Built-in-self-test (BIST), clock driver circuits, and architected and designed various low power circuits, modem and microprocessor blocks used in wireless communication systems, mobile devices and datacenter chips. • Provided expert services in the areas of semiconductor development, manufacture and test. • Founded a research organization within Qualcomm focused on processor circuits and architecture resulting in dozens of patent applications. The primary goal was to think outside the box to enhance performance and reduce power consumption targeting products in mobile, wearables, internet of things (IOT), datacenter and machine learning (ML). • Sat on several Qualcomm internal patent review boards to evaluate employee patent submissions covering VLSI design, circuits, CPU architecture, and low power circuits. • Managed engineering teams for more than 20 chip development efforts totaling more than a billion devices. Worked through and led teams through all phases of chip development from inception to commercialization. • At various points, put in place the development methodology (tools & processes) used by the engineering team. EXPERIENCE PROFILE SMARTSEMI ENGINEERING, Raleigh, NC and Ottawa, Canada 2018-present Principal, Semiconductor Services Providing consultant services in the areas of semiconductor development, manufacture and test. GLOBALFOUNDRIES (GF), Fishkill, NY 2018 Vice President of Engineering, Silicon Photonics Led product development activities for a coherent optical transceiver (ICTROSA) spanning system architecture, chip design, packaging, manufacturing and system test, board design, and firmware. • Hired by CEO to transform GF into a "product company". Reduced Silicon Photonics OPEX by 35% by identifying organizational gaps, defining development processes, and streamlining product roadmap. QUALCOMM DATACENTER TECHNOLOGIES, Raleigh, NC 2015 - 2017 Vice President of Engineering, Datacenter Technologies Oversaw engineering efforts and managed $360M annual budget and 900+ person engineering team spanning several domestic and international sites. Delivered chips, platforms, and software targeting data center, enterprise and cloud computing while leading world-class CPU design team responsible for Qualcomm's Snapdragon mobile products. • Drove team to execute 2 successful product tapeouts at 1/10 of operating expense of nearest competitor by defining a focused product roadmap, analyzing competitor offerings, and ensuring competitive product execution cadence. • Successfully delivered custom CPU for high-tier Snapdragon mobile products, supported debug efforts and brainstorming sessions to work through commercialization challenges. • Grew staff to 250 people in first year and achieved first product tapeout 6 weeks early by facilitating and setting up engineering portion of $250M joint venture (JV) in China focused on datacenter chip development. QUALCOMM TECHNOLOGIES INC., CORPORATE R&D DIVISION, Raleigh, NC 2012 - 2015 Vice President of Technology for Processor Research Formed and led Qualcomm's Processor Research Team, focused on researching circuit, architecture, and software techniques to enhance processor performance and power. Target markets included IOT, wearables, mobile, data center, and machine learning (ML). • Enabled design wins by driving many research ideas intersecting Qualcomm's product roadmap, including a critical research project that was responsible for achieving a customer-required power target resulting in $5B design win. • Established and built Qualcomm name recognition in computer architecture community by recruiting top-notch cross- functional team from well-known industry and academic players in processor space. • Doubled product cadence (from 36 months to 18 months) by delivering many tools, performance modeling, and analyses, enabling product team with a significant head start on next generation CPU designs. QUALCOMM TECHNOLOGIES INC., QCT DIVISION, Raleigh, NC 2006 - 2012 Vice President of Technology for Computing & Consumer Products Directed engineering team that developed mobile chips, platforms, and software to target new markets including tablets, netbooks, and laptops. Managed budgets, staffing, reviews, defined development processes and best practices to ensure on-time product completion. • Provided highest levels of CPU and multimedia performance by delivering and commercializing several mobile processor chips, including world's first mobile GHz microprocessor. • Delivered first quad-core application mobile processor which became the workhorse for tablets, netbooks, ARM-powered laptops, and the automotive market with volumes in excess of 100M devices by proposing radical change to roadmap and driving team to meet aggressive targets. • Completed dozens of projects across company that totaled hundreds of millions of units by leading team to deliver high- performance DDR controllers, bus interconnects, and various CPU-related blocks. • Drove team to exceed performance, power, and cost targets while minimizing silicon revisions (tapeouts) by overseeing team on evaluating new technologies, conducting technical reviews, and adapting to ever-changing requirements. • Grew business by delivering aggressive devices that enabled a new class of high-end smartphones, called "superphones", by managing team, defining chip roadmap and features, engaging with customers, and assessing competitor solutions. QUALCOMM INC., QCT DIVISION, San Diego, CA 1995 - 2006 Engineer to Senior Director, Engineering Managed chip development for Qualcomm's main-stream, high-volume, revenue-generating baseband mobile products. Provided support and defined product roadmap, competitive analysis, customer engagements, while leading engineering teams to develop and commercialize devices to aggressive schedules. • Earned recognition for skills and knowledge with multiple rapid promotions from entry level Engineer to Senior Director, as well as multiple company-wide awards for achieving technical success in new businesses. • Demonstrated exceptional productivity and motivation by owning many increasingly complex logic design blocks in wireless modem, microprocessor, chip interfaces and chip test. • Recognized by senior leadership for ability to overcome any obstacles by architecting and designing products for new markets, including world's first multi-user base station chip, world's first CDMA2K base station chip, and world's first WCDMA/UMTS commercial chip. • Increased company growth and staff from 100 in first year to over 2K a decade later by starting Qualcomm's ASIC design center in India, including training, assigning projects, reviewing work. • Maintained company's rapid growth by performing technical evaluation (due diligence) of acquisition targets for adding engineering talent and / or key technology. • Established, developed, and independently managed methodology and design tools that scaled to support a large multi- hundred person organization. EDUCATION Master of Science (MS), Electrical Engineering, Comm Theory & Systems, University of California, San Diego, CA Bachelor of Applied Science (BASc), Computer Engineering (Honors), University of Waterloo, Canada SPEAKERSHIPS Event Title 2001 Hot Chips A Mobile Station Modem Chip for WCDMA 2012 CMOS Emerging Technologies Computing Trends and the Mobile Experience 2012 CMU Computer Architecture Lab Computing Trends for Mobile Devices 2013 Booz Allen Hamilton Distinguished Series Computing Trends and the Mobile Experience 2012 UW Madison Computer Architecture Series Computing Trends and the Mobile Experience 2013 International Symposium on Computer Challenges and Roadmaps in Computer Architecture (ISCA) Architectures – the Next Decade 2014 SICS Software Week Mobile Processor Design Pitfalls 2015 Sherman Center for Engineering The Computer in your Pocket Entrepreneurship at Northeastern University PATENTS Patent # Title 6,205,186 Decoding with partial state information on a convolutionally encoded channel 6,269,130 Cached chainback RAM for serial viterbi decoder 6,278,715 System and method for reducing deinterleaver memory requirements through chunk allocation 6,333,954 High-speed ACS for Viterbi decoder implementations 6,366,600 Spreader architecture for direct sequence spread spectrum communications 6,493,354 Resource Allocator 6,519,297 Decoding with partial state information on a convolutionally encoded channel 6,757,864 Method and apparatus for efficiently reading and storing state metrics in memory for high-speed ACS viterbi decoder implementations 7,184,915 Tiered built-in self-test (BIST) architecture for testing distributed memory modules 7,392,442 Built-in self-test (BIST) architecture having distributed interpretation and generalized command protocol 8,661,274 Temperature compensating adaptive voltage scalers (AVSs), systems, and methods 8,750,324 Single wire bus interface 8,779,824 Clock distribution using MTJ sensing 9,429,982 Configurable last level clock driver for improved energy efficiency of a resonant clock 9,495,899 Contactless data communication using in-plane magnetic fields, and related systems and methods 9,741,452 Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methods 9,842,634 Wordline negative boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methods 9,882,609 Contactless data communication using in-plane magnetic fields, and related systems and methods 9,947,406 Dynamic tag compare circuits employing P-type field-effect transistor (PFET)-dominant evaluation circuits for reduced evaluation time, and related systems and methods 9,984,730 Negative supply rail positive boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methods 10,026,456 Bitline positive boost write-assist circuits for memory bit cells employing a P-type Field-Effect transistor (PFET) write port(s), and related systems and methods 10,115,481 Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methods 10,163,490 P-type field-effect transistor (PFET)-based sense amplifiers for reading PFET pass-gate memory bit cells, and related memory systems and methods